A conventional digital picture data receiver may be constructed as shown in FIG. 1 when used for a digital television broadcasting system such as a digital data transmission system. That is, numeral 11 in FIG. 1 denotes an input terminal to which a plurality of high frequency digital orthogonal modulation signals are processed such as QPSK (four phase shift modulation) modulation. 16 QAM (16 quadrature amplitude modulation) modulation and 64 QAM modulation.
These plurality of high frequency digital orthogonal modulation signals supplied to the input terminal 11 are amplified by a high frequency amplifier 12 and then supplied to a first mixer 13. Then the high frequency digital orthogonal modulation signals are mixed with a first local oscillation signal output from a first local oscillator 16 which comprises a first high frequency oscillator 14 and a first PLL (phase-locked loop) 15. Then the high frequency digital orthogonal modulation signals are up-converted to a first intermediate frequency signal. In this case, it is possible to choose a desirable signal among the plurality of high frequency digital orthogonal modulation signals by means of properly changing the frequency of the first local oscillation signal.
The first intermediate frequency signal output from the first mixer 13 experiences a band limitation in a first intermediate frequency BPF (band-pass filter). The first intermediate frequency signal is then amplified in a first intermediate frequency amplifier 18 and further supplied to a second mixer 19. The first intermediate frequency signal is mixed with a second local oscillation signal output from a second local oscillator 22 which is comprised of a second high frequency oscillator 20 and a second PLL 21. Thus the first intermediate frequency signal is down-converted into a second intermediate frequency signal. In this case, the frequency of the second local oscillation signal output from the second local oscillator 22 is almost fixed.
Here, the second intermediate frequency signal output from the second mixer 19 experiences a band limitation in a second intermediate frequency BPF 23, and after that the band limited second intermediate frequency signal is supplied to both of an I axis phase comparator 24 and a Q axis phase comparator 25. A pair of third local oscillation signals are supplied to the I axis phase comparator 24 and the Q axis phase comparator 25, respectively. The pair of third local oscillation signals are orthogonally related in their phases with each other.
Further the I axis phase comparator 24 and the Q axis phase comparator 25 perform a synchronous detection or a quasi-synchronous detection on the second intermediate frequency signal by comparing the phases of the second intermediate frequency signal and the third local oscillation signal, so as to demodulate the I signal and Q signal. The I signal output from the I axis phase comparator 24 and the Q signal output from the Q axis phase comparator 25 are respectively output from the output terminals 29 and 30 through the phase control signal generator 28.
The phase control signal generator 28 generates the phase control signal controlling the third local oscillation signal for the synchronous detection or the quasi-synchronous detection in the I axis phase comparator 24 and the Q axis comparator 25. The phase control signal output from the phase control signal generator 28 is supplied to the third local oscillator 26 after a conversion to the phase control voltage by a COSTAS loop LPF (low pass filter) so as to control the oscillation frequency.
Here, the first local oscillator 18 is a variable oscillator with a PLL frequency synthesizer. While the second local oscillator 22 is generally configured by a fixed oscillator with a PLL frequency synthesizer.
However, the conventional digital data receiver as described above has drawbacks. For instance, the receiver requires two systems having independent PLL frequency synthesizers. The receiver is also complicated in its construction and expensive since the receiver utilizes the PLL frequency synthesizers for the first and second local oscillators 16 and 22 as well as a highly stabilized oscillator such as a VCXO (voltage controlled crystal oscillator) for the third local oscillator 26 to secure a higher frequency stability.